Schottky drain current of 2D material FET
Posted Nov 23, 2019, 1:30 PM EST Electrical, MEMS & Nanotechnology, Semiconductors Version 5.4 0 Replies
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Hi Forum, I'm trying to plot the schottky drain current varying by applied gate voltage in WS2 FET, which has p-type doped Si substrate and WS2 channel. Although my design give pretty much accceptable result for ID vs. Vd, ID vs. Vg does not give resonable result. The drain current difference from -30 to 30V gate voltage is only about 5 uA, but what I expected is like an exponential increase. Please give any idea so that I can solve this problem. Thanks for reading.
Hello JM Lee
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